An FPGA Implementation of a Chaotic Encryption Algorithm

Summary

Visual sight is an important and easy sense of communication. Recently, since computer speed, media storage and network bandwidth have seen great improvements of their performances, imaging has gained even more importance along with security, privacy and intellectual property defense.

In order for a complex imaging system to cope with these concerns, a cryptography scheme able to manage the vast amounts of data involved in image processing is required. So far, many image encryption algorithms have been restricted to the software realm, primarily due to its ease of use, ease of update, portability and flexibility. But when throughput and secret key storage security become a major issue, hardware implementations are by nature more physically secure and potentially faster.

This work aims to investigate hardware feasibility and performance of an encryption technique proposed by J. Scharinger, and based on the highly unstable non-linear dynamics of chaotic Kolmogorov flows. The algorithm is particularly attractive since only additions, subtractions and bit-shifts are required and no time-consuming operations like multiplications or exponentiation.

In this context, re-programmable devices such as FPGAs are highly attractive options since they provide hardware agility, parameterization and developing cost efficiency. The chip chosen for the implementation is a Xilinx's Virtex XCV400BG432-6, whose embedded RAM allows manipulation of small images directly in situ.

Index

1. Introduction
   1. Chapter Organization
2. Description of a Chaotic Cipher
   1. General Remarks About Cryptography
      1. Basic Terminology
      2. Classification of Cryptosystems
      3. Confusion and Diffusion
   2. Chaos and Kolmogorov Flows
      1. Basic Introduction to Chaos
      2. Kolmogorov Chaotic Systems
      3. Pseudo-Random Sequences
   3. Algorithm Behavioural Description
3. Tools and Methods
   1. FPGA
      1. Why FPGAs?
      2. The SRMA Based FPGA
   2. VHDL
      1. Entities
      2. Architectures
      3. Configurations
      4. Generic Parameters
   3. Software Tools
      1. Editing
      2. Compilation and Simulation
      3. Synthesis
      4. Place-and-Route and Back-Annotation
      5. Other Tools
   4. Adopted Methodology
4. Architectural Implementation Analysis
   1. Algorithm Feasibility
      1. Permutation
      2. Substitution
      3. PRNG
      4. Other Components
      5. Entire System
   2. Some Improvements
      1. Limits and New Ideas
      2. Using the Ingerse Kolmogorov Flow
      3. Packing Atoms
   3. One-Shot Approach
      1. Permutation One-Shot
      2. Boundary
      3. Substitution One-Shot
      4. PRNG
      5. System One-Shot
      6. Entire System
   4. Using More Than One Memory
      1. Substitution One-Shot Multi-Memory
5. Performance Evaluation
   1. Data Interpretation
   2. Data Analysis
      1. First Implementation
      2. One-Shot Implementation
6. Conclusions
7. Acronyms
8. Bibliography